80286 Internal Architecture MCQs : This section focuses on the "80286 Internal Architecture". These Multiple Choice Questions (MCQs) should be practiced to improve the 80286 Internal Architecture skills required for various interviews (campus interview, walk-in interview, company interview), placement, entrance exam and other competitive examinations.
Question 1
For which of the following instruction does the return address point to instruction causing an exception?
A. divide error exception
B. bound range exceeded exception
C. invalid opcode exception
D. all of the mentioned
Question 2
The additional field that is available in 80286 is
A. I/O Privilege field
B. nested task flag
C. protection enable
D. all of the mentioned
Question 3
The bits that are modified according to the result of the execution of logical and arithmetic instructions are called
A. byte addressable bit
B. control flag bits
C. status flag bit
D. none of the mentioned
Question 4
The CPU must flush out the prefetched instructions immediately following the branch instruction in
A. conditional branch
B. unconditional branch
C. conditional and unconditional branches
D. none of the mentioned
Question 5
The CPU of 80286 contains
A. 16-bit general purpose registers
B. 16-bit segment registers
C. status and control register
D. all of the mentioned
Question 6
The device that interfaces and control the internal data bus with the system bus is
A. data interface
B. controller interface
C. data and control interface
D. data transreceiver
Question 7
The flags that are used for controlling machine operation are called
A. status flags
B. control flags
C. machine controlled flags
D. all of the mentioned
Question 8
The instruction that comes into action, if the trap flag is set is
A. maskable interrupt
B. non-maskable interrupt
C. single step interrupt
D. breakpoint interrupt
Question 9
The interrupt that has the highest priority among the following is
A. Single step
B. NMI (non-maskable interrupt)
C. INTR
D. Instruction exception
Question 10
The interrupt that has the lowest priority among the following is
A. Processor extension segment overrun
B. INTR
C. INT instruction
D. NMI
Question 11
The register bank of Execution Unit of 80286 is used as
A. for storing data
B. scratch pad
C. special purpose registers
D. all of the mentioned
Question 12
The process of fetching the instructions in advance, and storing in the queue is called
A. mapping
B. swapping
C. instruction pipelining
D. storing
Question 13
Which of the block is not considered as a block of an architecture of 80286?
A. address unit
B. bus unit
C. instruction unit
D. control unit
Question 14
Which of the following is not an interrupt generated by 80286?
A. software interrupts
B. hardware or external interrupts
C. INT instruction
D. none of the mentioned