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8051 Instruction Set MCQ Questions & Answers

8051 Instruction Set MCQs : This section focuses on the "8051 Instruction Set". These Multiple Choice Questions (MCQs) should be practiced to improve the 8051 Instruction Set skills required for various interviews (campus interview, walk-in interview, company interview), placement, entrance exam and other competitive examinations.




Question 1

All conditional jumps are

A. absolute jumps
B. long jumps
C. short jumps
D. none

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Question 2

If the most significant bit of relative address byte is 1, then the short jump instruction is

A. forward jump
B. back jump
C. either forward or back jump
D. none

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Question 3

In boolean instructions, the flag that is the only allowed destination operand for two operand instructions is

A. overflow flag
B. underflow flag
C. auxiliary flag
D. carry flag

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Question 4

In logical instructions, the immediate data can be an operand for

A. increment operation
B. decrement operation
C. single operand instruction
D. none

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Question 5

The absolute jump instruction is intended mainly for a jump within a memory space of

A. 2 bytes
B. 2 Kbytes
C. 2 Mbytes
D. none

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Question 6

The conditional control transfer instructions check a bit condition which includes any bit of

A. bit addressable RAM
B. bit addressable SFRs
C. content of accumulator
D. all of the mentioned

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Question 7

The conditional control transfer instructions use

A. status flags
B. bits of bit addressable RAM
C. SFRs termed bit
D. all of the mentioned

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Question 8

The control transfer instructions are divided into

A. explicit and implicit control transfer instructions
B. conditional and unconditional control transfer instructions
C. auto control and self control transfer instructions
D. all of the mentioned

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Question 9

The first byte of a short jump instruction represents

A. opcode byte
B. relative address
C. opcode field
D. none

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Question 10

The first byte of an absolute jump instruction consists of

A. 3 LSBs of opcode and 5 MSBs of 11-bit address
B. 5 MSBs of opcode and 3 LSBs of 11-bit address
C. 6 MSBs of opcode and 1 LSB of 11-bit address
D. 5 LSBs of opcode and 3 MSBs of 11-bit address

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Question 11

The instruction that is used to complement or invert the bit of a bit addressable SFR is

A. CLR C
B. CPL C
C. CPL Bit
D. ANL Bit

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Question 12

The LJMP instruction is very useful in programming in the external code memory space of

A. 32 MB
B. 64 MB
C. 32 KB
D. 64 KB

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Question 13

The mnemonic used to perform a subtraction of source with an 8-bit data and jumps to specified relative address if subtraction is non-zero is

A. DJNZ
B. CJNE
C. JZ
D. JNC

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Question 14

The mnemonic, JNB is used to jump to the specified relative address only if

A. specified bit=1
B. specified bit=0
C. specified bit is non-recursive
D. none

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Question 15

The operations performed by data transfer instructions are on

A. bit data
B. byte data
C. 16-bit data
D. all of the mentioned

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Question 16

The instructions that change the sequence of execution are

A. conditional instructions
B. logical instructions
C. control transfer instructions
D. data transfer instructions

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Question 17

The third byte of the long jump instruction is

A. opcode
B. 5 LSBs of opcode
C. higher byte of jump location or subroutine
D. lower byte of jump location or subroutine

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Question 18

The type of operand that is not allowed to use in boolean instructions of 8051 is

A. direct register operands
B. indirect register operands
C. immediate bit
D. none

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Question 19

Which of the following is not a conditional control transfer instruction?

A. JC
B. JBC
C. JNC
D. NONE

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Question 20

Which of the following is not an instruction of 8051 instructions?

A. arithmetic instructions
B. boolean instructions
C. logical instructions
D. none

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Question 21

Which of the following is not an unconditional control transfer instruction?

A. JMP
B. RET
C. JNC
D. CALL

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Question 22

Which of the following is true while executing data transfer instructions?

A. program counter is not accessible
B. restricted bit-transfer operations are allowed
C. both operands can be direct/indirect register operands
D. all of the mentioned

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