8051 Interrupt & Stack MCQs : This section focuses on the "8051 Interrupt & Stack". These Multiple Choice Questions (MCQs) should be practiced to improve the 8051 Interrupt & Stack skills required for various interviews (campus interview, walk-in interview, company interview), placement, entrance exam and other competitive examinations.
Question 1
After reset, the stack pointer(SP) is initialized to the address of
A. internal ROM
B. internal RAM
C. external ROM
D. external RAM
Question 2
All the interrupts are enabled using a special function register called
A. interrupt priority register
B. interrupt register
C. interrupt function register
D. interrupt enable register
Question 3
If the external interrupt sources control the flags IE0 and IE1, then the interrupt programmed is
A. level-sensitive
B. edge-sensitive
C. in serial port
D. in parallel port
Question 4
If the external interrupts are programmed edge sensitive, then they should remain high for atleast
A. 0 machine cycle
B. 2 machine cycles
C. 1 machine cycle
D. 3 machine cycles
Question 5
In serial port interrupt, after the control is transferred to the interrupt service routine, the flag that is cleared is
A. RI
B. TI
C. RI and TI
D. None
Question 6
In timer mode, the oscillator clock is divided by a prescalar
A. (1/8)
B. (1/4)
C. (1/16)
D. (1/32)
Question 7
The 8051 stack is
A. auto-decrement during PUSH operations
B. auto-increment during POP operations
C. auto-decrement during POP operations
D. auto-increment during PUSH operations
Question 8
The atleast number of machine cycles for which the external interrupts that are programmed level-sensitive should remain high is
A. 1
B. 2
C. 3
D. 0
Question 9
The external interrupt that has the lowest priority among the following is
A. TF0
B. TF1
C. IE1
D. NONE
Question 10
The flags IE0 and IE1, are automatically cleared after the control is transferred to respective vector if the interrupt is
A. level-sensitive
B. edge-sensitive
C. in serial port
D. in parallel port
Question 11
The interrupts, INT0(active low) and INT1(active low) are processed internally by flags
A. IE0 and IE1
B. IE0 and IF1
C. IF0 and IE1
D. IF0 and IF1
Question 12
The number of bytes stored on the stack during one operation of PUSH or POP is
A. 1
B. 2
C. 3
D. 4
Question 13
The serial port interrupt is generated if
A. RI is set
B. RI and TI are set
C. Either RI or TI is set
D. RI and TI are reset
Question 14
The step involved in POP operation is
A. decrement stack by 2 and store 8-bit content to address pointed to by SP
B. store 16-bit content to address pointed to by SP and decrement stack by 1
C. decrement stack by 1 and store content of top of stack to address pointed to by SP
D. store content of top of stack to address pointed to by SP and then decrement stack by 1
Question 15
The step involved in PUSH operation is
A. increment stack by 2 and store 8-bit content to address pointed to by SP
B. decrement stack by 1 and store 16-bit content to address pointed to by SP
C. increment stack by 1 and store 8-bit content to address pointed to by SP
D. store 8-bit content to address pointed to by SP and then increment stack by 1
Question 16
The timer generates an interrupt, if the count value reaches to
A. 00FFH
B. FF00H
C. 0FFFH
D. FFFFH
Question 17
The pulses at T0 or T1 pin are counted in
A. timer mode
B. counter mode
C. idle mode
D. power down mode
Question 18
Among the five interrupts generated by 8051, the lowest priority is given to the interrupt
A. IE0
B. TF1
C. TF0
D. RI
Question 19
Which of the following is an external interrupt?
A. INT0(active low)
B. INT2(active low)
C. Timer0 interrupt
D. Timer1 interrupt