8086 Microprocessor MCQs : This section focuses on the "8086 Microprocessor". These Multiple Choice Questions (MCQs) should be practiced to improve the 8086 Microprocessor skills required for various interviews (campus interview, walk-in interview, company interview), placement, entrance exam and other competitive examinations.
Question 1
A microprocessor is a _______ chip integrating all the functions of a CPU of a computer.
A. multiple
B. single
C. double
D. triple
Question 2
Microprocessor is a/an _______ circuit that functions as the CPU of the compute
A. electronic
B. mechanic
C. integrating
D. processing
Question 3
Microprocessor is the ______ of the computer and it perform all the computational tasks
A. main
B. heart
C. important
D. simple
Question 4
The purpose of the microprocessor is to control ______
A. memory
B. switches
C. processing
D. tasks
Question 5
The first digital electronic computer was built in the year________
A. 1950
B. 1960
C. 1940
D. 1930
Question 6
In 1960's texas institute invented ______
A. integrated circuits
B. microprocessor
C. vacuum tubes
D. transistors
Question 7
The intel 8086 microprocessor is a _______ processor
A. 8 bit
B. 16 bit
C. 32 bit
D. 4 bit
Question 8
The microprocessor can read/write 16 bit data from or to ________
A. memory
B. i /o device
C. processor
D. register
Question 9
The work of EU is ________
A. encoding
B. decoding
C. processing
D. calculations
Question 10
The 16 bit flag of 8086 microprocessor is responsible to indicate ___________
A. the condition of result of alu operation
B. the condition of memory
C. the result of addition
D. the result of subtraction
Question 11
The CF is known as ________
A. carry flag
B. condition flag
C. common flag
D. single flag
Question 12
The SF is called as ________
A. service flag
B. sign flag
C. single flag
D. condition flag
Question 13
The OF is called as _______
A. overflow flag
B. overdue flag
C. one flag
D. over flag
Question 14
The JS is called as ______
A. jump the signed bit
B. jump single bit
C. jump simple bit
D. jump signal it
Question 15
The IF is called as _________
A. initial flag
B. indicate flag
C. interrupt flag
D. inter flag
Question 16
Instruction providing both segment base and offset address are called _____
A. below type .
B. far type
C. low type
D. high type
Question 17
The register AX is formed by grouping ________
A. ah & al
B. bh & bl
C. ch & cl
D. dh & dl
Question 18
The conditional branch instruction specify ___________ for branching
A. conditions
B. instruction
C. address
D. memory
Question 19
The SP is indicated by ________
A. single pointer
B. stack pointer
C. source pointer
D. destination pointer
Question 20
The BP is indicated by _______
A. base pointer
B. binary pointer
C. bit pointer
D. digital pointer
Question 21
______
A. carry flag
B. conditional flag
C. common flag
D. sign flag
Question 22
The SS is called as ________
A. single stack
B. stack segment
C. sequence stack
D. random stack
Question 23
The LES copies to words from memory to register and __________
A. ds
B. cs
C. es
D. ds
Question 24
The index register are used to hold _______
A. memory register
B. offset address
C. segment memory
D. offset memory
Question 25
The _________ translates a byte from one code to another code
A. xlat
B. xchng
C. pop
D. push
Question 26
The BIU contains FIFO register of size __________ bytes
A. 8
B. 6
C. 4
D. 12
Question 27
The _______ contains an offset instead of actual address
A. sp
B. ip
C. es
D. ss
Question 28
The BIU prefetches the instruction from memory and store them in ________
A. queue
B. register
C. memory
D. stack
Question 29
The 8086 fetches instruction one after another from __________ of memory
A. code segment
B. ip
C. es
D. ss
Question 30
The 1 MB byte of memory can be divided into ______ segment
A. 1 kbyte
B. 64 kbyte
C. 33 kbyte
D. 34 kbyte
Question 31
The BIU contains FIFO register of size 6 bytes called _____.
A. queue
B. stack
C. segment
D. register
Question 32
The DS is called as _______
A. data segment
B. digital segment
C. divide segment
D. decode segment
Question 33
Signal
A. ur signal
B. vcc
C. aie
D. ground
Question 34
The CS register stores instruction _____________ in code segment
A. stream
B. path
C. codes
D. stream line
Question 35
The IP is ________ bits in length
A. 8 bits
B. 4 bits
C. 16 bits
D. 32 bits
Question 36
The pin of minimum mode AD0-AD15 has ____________ address
A. 16 bit
B. 20 bit
C. 32 bit
D. 4 bit
Question 37
The pin of minimum mode AD0- AD15 has _________ data bus
A. 4 bit
B. 20 bit
C. 16 bit
D. 32 bit
Question 38
The push source copies a word from source to ______
A. stack
B. memory
C. register
D. destination
Question 39
The address bits are sent out on lines through __________
A. a16-19
B. a0-17
C. d0-d17
D. c0-c17
Question 40
LDs copies to consecutive words from memory to register and ___________
A. es
B. ds
C. ss
D. cs
Question 41
________ is used to write into memory
A. rd
B. wr
C. rd / wr
D. clk
Question 42
The functions of Pins from 24 to 31 depend on the mode in which _______ is operating
A. 8085
B. 8086
C. 80835
D. 80845
Question 43
INC destination increments the content of destination by _______
A. 1
B. 2
C. 30
D. 41
Question 44
The RD, WR, M/IO is the heart of control for a __________ mode
A. minimum
B. maximum
C. compatibility mode
D. control mode
Question 45
IMUL source is a signed _________
A. multiplication
B. addition
C. subtraction
D. division
Question 46
In a minimum mode there is a ___________ on the system bus
A. single
B. double
C. multiple
D. triple
Question 47
_________destination inverts each bit of destination
A. not
B. nor
C. and
D. or
Question 48
If MN/MX is low the 8086 operates in __________ mode
A. minimum
B. maximum
C. both (a) and (b)
D. medium
Question 49
In max mode, control bus signal So,S1 and S2 are sent out in ____________ form
A. decoded
B. encoded
C. shared
D. unshared
Question 50
The ___ bus controller device decodes the signals to produce the control bus signal
A. internal
B. data
C. external
D. address
Question 51
interrupted program
A. forward
B. return
C. data
D. line
Question 52
The main concerns of the ___________ are to define a flexible set of commands
A. memory interface
B. peripheral interface
C. both (a) and (b)
D. control interface
Question 53
and write into register
A. multiprocessor
B. microprocessor
C. dual processor
D. coprocessor
Question 54
To perform any operations, the Mp should identify the __________
A. register
B. memory
C. interface
D. system
Question 55
The Microprocessor places __________ address on the address bus
A. 4 bit
B. 8 bit
C. 16 bit
D. 32 bit
Question 56
The microprocessor determines whether the specified condition exists or not by testing the
A. carry flag
B. conditional flag
C. common flag
D. sign flag
Question 57
register should be selected
A. address
B. one
C. two
D. three
Question 58
The LES copies to words from memory to register and
A. ds
B. cs
C. es
D. ds
Question 59
The ________of the memory chip will identify and select the register for the EPROM
A. internal decoder
B. external decoder
C. address decoder
D. data decoder
Question 60
The translates a byte from one code to another code
A. xlat
B. xchng
C. pop
D. push
Question 61
Microprocessor provides signal like ____ to indicate the read operatio
A. low
B. mcmw
C. mcmr
D. mcmwr
Question 62
The contains an offset instead of actual address
A. sp
B. ip
C. es
D. ss
Question 63
must be added to address lines of the _______ chip.
A. single
B. memory
C. multiple
D. triple
Question 64
The 8086 fetches instruction one after another from of memory
A. code segment
B. ip
C. es
D. ss
Question 65
The remaining address line of ______ bus is decoded to generate chip select signal
A. data
B. address
C. control bus
D. both (a) and (b)
Question 66
The BIU contains FIFO register of size 6 bytes called .
A. queue
B. stack
C. segment
D. register
Question 67
_______ signal is generated by combining RD and WR signals with IO/M
A. control
B. memory
C. register
D. system
Question 68
The is required to synchronize the internal operands in the processor CLK Signal
A. ur signal
B. vcc
C. aie
D. ground
Question 69
Memory is an integral part of a _______ system
A. supercomputer
B. microcomputer
C. mini computer
D. mainframe computer
Question 70
The pin of minimum mode AD0-AD15 has address
A. 16 bit
B. 20 bit
C. 32 bit
D. 4 bit
Question 71
_____ has certain signal requirements write into and read from its registers
A. memory
B. register
C. both (a) and (b)
D. control
Question 72
The pin of minimum mode AD0- AD15 has _ data bus
A. 4 bit
B. 20 bit
C. 16 bit
D. 32 bit
Question 73
is used to write into memory
A. rd
B. wr
C. rd / wr
D. clk
Question 74
An _________ is used to fetch one address
A. internal decoder
B. external decoder
C. encoder
D. register
Question 75
The RD, WR, M/IO is the heart of control for a mode
A. minimum
B. maximum
C. compatibility mode
D. control mode
Question 76
The primary function of the _____________ is to accept data from I/P devices
A. multiprocessor
B. microprocessor
C. peripherals
D. interfaces
Question 77
In a minimum mode there is a on the system bus
A. single
B. double
C. multiple
D. triple
Question 78
___________ signal prevent the microprocessor from reading the same data more than one
A. pipelining
B. handshaking
C. controlling
D. signaling
Question 79
If MN/MX is low the 8086 operates in mode
A. minimum
B. maximum
C. both (a) and (b)
D. medium
Question 80
Bits in IRR interrupt are ______
A. reset
B. set
C. stop
D. start
Question 81
In max mode, control bus signal So,S1 and S2 are sent out in form
A. decoded
B. encoded
C. shared
D. unshared
Question 82
__________ generate interrupt signal to microprocessor and receive acknowledge
A. priority resolver
B. control logic
C. interrupt request register
D. interrupt register
Question 83
The bus controller device decodes the signals to produce the control bus signal
A. internal
B. data
C. external
D. address
Question 84
The _______ pin is used to select direct command word
A. a0
B. d7-d6
C. a12
D. ad7-ad6
Question 85
A Instruction at the end of interrupt service program takes the execution back to the interrupted program
A. forward
B. return
C. data
D. line
Question 86
The _______ is used to connect more microprocessor
A. peripheral device
B. cascade
C. i/o devices
D. control unit
Question 87
Primary function of memory interfacing is that the should be able to read from and write into register
A. multiprocessor
B. microprocessor
C. dual processor
D. coprocessor
Question 88
CS connect the output of ______
A. encoder
B. decoder
C. slave program
D. buffer
Question 89
To perform any operations, the Mp should identify the
A. register
B. memory
C. interface
D. system
Question 90
In which year, 8086 was introduced?
A. 1978
B. 1979
C. 1977
D. 1981
Question 91
Expansion for HMOS technology_______
A. high level mode oxygen semiconductor
B. high level metal oxygen semiconductor
C. high performance medium oxide semiconductor
D. high performance metal oxide semiconductor
Question 92
The Microprocessor places address on the address bus
A. 4 bit
B. 8 bit
C. 16 bit
D. 32 bit
Question 93
8086 and 8088 contains _______ transistors
A. 29000
B. 24000
C. 34000
D. 54000
Question 94
The Microprocessor places 16 bit address on the add lines from that address by register should be selected
A. address
B. one
C. two
D. three
Question 95
ALE stands for ___________
A. address latch enable
B. address level enable
C. address leak enable
D. address leak extension
Question 96
The of the memory chip will identify and select the register for the EPROM
A. internal decoder
B. external decoder
C. address decoder
D. data decoder
Question 97
What is DEN?
A. direct enable
B. data entered
C. data enable
D. data encoding
Question 98
Microprocessor provides signal like to indicate the read operatio
A. low
B. mcmw
C. mcmr
D. mcmwr
Question 99
In 8086, Example for Non maskable interrupts are ________.
A. trap
B. rst6.5
C. intr
D. rst6.6
Question 100
To interface memory with the microprocessor, connect register the lines of the address bus must be added to address lines of the chip.
A. single
B. memory
C. multiple
D. triple
Question 101
The remaining address line of bus is decoded to generate chip select signal
A. data
B. address
C. control bus
D. both (a) and (b)
Question 102
signal is generated by combining RD and WR signals with IO/M
A. control
B. memory
C. register
D. system
Question 103
has certain signal requirements write into and read from its registers
A. memory
B. register
C. both (a) and (b)
D. control
Question 104
In 8086 the overflow flag is set when _____________.
A. the sum is more than 16 bits.
B. signed numbers go out of their range after an arithmetic operation.
C. carry and sign flags are set.
D. subtraction
Question 105
An is used to fetch one address
A. internal decoder
B. external decoder
C. encoder
D. register
Question 106
In 8086 microprocessor the following has the highest priority among all type interrupts?
A. nmi
B. div 0
C. type 255
D. over flow
Question 107
The primary function of the is to accept data from I/P devices
A. multiprocessor
B. microprocessor
C. peripherals
D. interfaces
Question 108
In 8086 microprocessor one of the following statements is not true?
A. coprocessor is interfaced in max mode.
B. coprocessor is interfaced in min mode.
C. i /o can be interfaced in max / min mode.
D. supports pipelining
Question 109
signal prevent the microprocessor from reading the same data more than one
A. pipelining
B. handshaking
C. controlling
D. signaling
Question 110
Address line for TRAP is?
A. 0023h
B. 0024h
C. 0033h
D. 0099h
Question 111
Bits in IRR interrupt are
A. reset
B. set
C. stop
D. start
Question 112
Access time is faster for _________.
A. rom
B. sram
C. dram
D. eram
Question 113
The pin is used to select direct command word
A. a0
B. d7-d6
C. a12
D. ad7-ad6
Question 114
The First Microprocessor was__________.
A. intel 4004
B. 8080
C. 8085
D. 4008
Question 115
CS connect the output of
A. encoder
B. decoder
C. slave program
D. buffer
Question 116
Status register is also called as ___________.
A. accumulator
B. stack
C. counter
D. flags
Question 117
8086 and 8088 contains transistors
A. 29000
B. 24000
C. 34000
D. 54000
Question 118
In 8086, Example for Non maskable interrupts are .
A. trap
B. rst6.5
C. intr
D. rst6.6
Question 119
Access time is faster for .
A. rom
B. sram
C. dram
D. eram
Question 120
The first microprocessor had a(n)________.
A. 1 – bit data bus
B. 2 – bit data bus
C. 4 – bit data bus
D. 8 – bit data bus
Question 121
The First Microprocessor was .
A. intel 4004
B. 8080
C. 8085
D. 4008
Question 122
Which microprocessor has multiplexed data and address lines?
A. 8086
B. 80286
C. 80386
D. pentium
Question 123
Status register is also called as .
A. accumulator
B. stack
C. counter
D. flags
Question 124
A 20-bit address bus allows access to a memory of capacity
A. 1 mb
B. 2 mb
C. 4 mb
D. 8 mb
Question 125
Which microprocessor accepts the program written for 8086 without any changes?
A. 8085
B. 8086
C. 8087
D. 8088
Question 126
Which group of instructions do not affect the flags?
A. arithmetic operations
B. logic operations
C. data transfer operations
D. branch operations
Question 127
The result of MOV AL, 65 is to store
A. store 0100 0010 in al
B. store 42h in al
C. store 40h in al
D. store 0100 0001 in al
Question 128
A microprocessor is a chip integrating all the functions of a CPU of a computer.
A. multiple
B. single
C. double
D. triple
Question 129
Microprocessor is a/an circuit that functions as the CPU of the compute
A. electronic
B. mechanic
C. integrating
D. processing
Question 130
Microprocessor is the of the computer and it perform all the computational tasks
A. main
B. heart
C. important
D. simple
Question 131
The purpose of the microprocessor is to control
A. memory
B. switches
C. processing
D. tasks
Question 132
The first digital electronic computer was built in the year
A. 1950
B. 1960
C. 1940
D. 1930
Question 133
In 1960's texas institute invented
A. integrated circuits
B. microprocessor
C. vacuum tubes
D. transistors
Question 134
The intel 8086 microprocessor is a processor
A. 8 bit
B. 16 bit
C. 32 bit
D. 4 bit
Question 135
The microprocessor can read/write 16 bit data from or to
A. memory
B. i /o device
C. processor
D. register
Question 136
In 8086 microprocessor , the address bus is bit wide
A. 12 bit
B. 10 bit
C. 16 bit
D. 20 bit
Question 137
The work of EU is
A. encoding
B. decoding
C. processing
D. calculations
Question 138
The SF is called as
A. service flag
B. sign flag
C. single flag
D. condition flag
Question 139
The OF is called as
A. overflow flag
B. overdue flag
C. one flag
D. over flag
Question 140
The IF is called as
A. initial flag
B. indicate flag
C. interrupt flag
D. inter flag
Question 141
The register AX is formed by grouping
A. ah & al
B. bh & bl
C. ch & cl
D. dh & dl
Question 142
The SP is indicated by
A. single pointer
B. stack pointer
C. source pointer
D. destination pointer
Question 143
The BP is indicated by
A. base pointer
B. binary pointer
C. bit pointer
D. digital pointer
Question 144
The SS is called as
A. single stack
B. stack segment
C. sequence stack .
D. random stack
Question 145
The index register are used to hold
A. memory register
B. offset address
C. segment memory
D. offset memory
Question 146
The BIU contains FIFO register of size bytes
A. 8
B. 6
C. 4
D. 12
Question 147
The BIU prefetches the instruction from memory and store them in
A. queue
B. register
C. memory
D. stack
Question 148
The 1 MB byte of memory can be divided into segment
A. 1 kbyte
B. 64 kbyte
C. 33 kbyte
D. 34 kbyte
Question 149
The DS is called as
A. data segment
B. digital segment
C. divide segment
D. decode segment
Question 150
The CS register stores instruction in code segment
A. stream
B. path
C. codes
D. stream line
Question 151
The IP is bits in length
A. 8 bits
B. 4 bits
C. 16 bits
D. 32 bits
Question 152
The push source copies a word from source to
A. stack
B. memory
C. register
D. destination
Question 153
LDs copies to consecutive words from memory to register and
A. es
B. ds
C. ss
D. cs
Question 154
IMUL source is a signed
A. multiplication
B. addition
C. subtraction
D. division
Question 155
destination inverts each bit of destination
A. not
B. nor
C. and
D. or
Question 156
Instruction providing both segment base and offset address are called
A. below type .
B. far type
C. low type
D. high type
Question 157
The conditional branch instruction specify for branching
A. conditions
B. instruction
C. address
D. memory