Describing Logic Circuits MCQs : This section focuses on the "Describing Logic Circuits". These Multiple Choice Questions (MCQs) should be practiced to improve the Describing Logic Circuits skills required for various interviews (campus interview, walk-in interview, company interview), placement, entrance exam and other competitive examinations.
Question 1
In VHDL, the mode of a port does not define:
A. an input.
B. an output.
C. both an input and an output.
D. the TYPE of the bit.
Question 2
The format used to present the logic output for the various combinations of logic inputs to a gate is called a(n):
A. truth table.
B. input logic function.
C. Boolean constant.
D. Boolean variable.
Question 3
Which of the following equations would accurately describe a 4-input OR gate when A = 1, B = 1, C = 0, and D = 0?
A. 1 + 1 + 0 + 0 = 1
B. 1 + 1 + 0 + 0 = 01
C. 1 + 1 + 0 + 0 = 0
D. 1 + 1 + 0 + 0 = 00
Question 4
Which of the examples below expresses the associative law of addition:
A. A + (B + C) = (A + B) + C
B. A + (B + C) = A + (BC)
C. A(BC) = (AB) + C
D. ABC = A + B + C
Question 5
A small circle on the output of a logic gate is used to represent the:
A. Comparator operation.
B. OR operation.
C. NOT operation.
D. AND operation.
Question 6
A NOR gate with one HIGH input and one LOW input:
A. will output a HIGH
B. functions as an AND
C. will not function
D. will output a LOW
Question 7
The logic gate that will have HIGH or "1" at its output when any one of its inputs is HIGH is a(n):
A. NOR gate
B. OR gate
C. AND gate
D. NOT operation
Question 8
Which of the examples below expresses the distributive law?
A. (A + B) + C = A + (B + C)
B. A(B + C) = AB + AC
C. A + (B + C) = AB + AC
D. A(BC) = (AB) + C
Question 9
A NAND gate has:
A. active-LOW inputs and an active-HIGH output.
B. active-LOW inputs and an active-LOW output.
C. active-HIGH inputs and an active-HIGH output.
D. active-HIGH inputs and an active-LOW output.
Question 10
The special software application that translates from HDL into a grid of 1's and 0's, which can be loaded into a PLD, is called a:
A. formatter.
B. compiler.
C. programmable wiring.
D. CPU.
Question 11
How are the statements between BEGIN and END not evaluated in VHDL?
A. Constantly
B. Simultaneously
C. Concurrently
D. Sequentially
Question 12
What is the basic difference between AHDL and VHDL?
A. ADHL is used in all PLD's.
B. VHDL is used in all PLD's.
C. ADHL is proprietary.
D. VHDL is proprietary.
Question 13
An OR gate with inverted inputs functions as:
A. an AND gate.
B. a NAND gate.
C. a NOR gate.
D. an inverter.