DAPZOI
Home Ask MCQ Quiz Topics Login


Digital Electronics MCQ Questions & Answers

Digital Electronics MCQs : This section focuses on the "Digital Electronics". These Multiple Choice Questions (MCQs) should be practiced to improve the Digital Electronics skills required for various interviews (campus interview, walk-in interview, company interview), placement, entrance exam and other competitive examinations.




Question 1

When a RAM module passes the checker board test it is                              

A. able to read and write only 0s
B. faulty
C. probably good
D. able to read and write only 1s

View Answer

Question 2

The purpose of a Digital Comparator is

A. to convert analog input into digital
B. to create different outputs
C. to add a set of different numbers
D. to compare a set of variables or unknown numbers

View Answer

Question 3

A counter circuit is usually constructed of

A. a number of latches connected in cascade form
B. a number of nand gates connected in cascade form
C. a number of flip-flops connected in cascade
D. a number of nor gates connected in cascade form

View Answer

Question 4

Which gate will a NAND gate be equivalent to when two inputs of NAND gates are shorted?

A. AND gate
B. OR gate
C. NAND gate
D. NOT gate

View Answer

Question 5

Applications of PLAs are                            

A. registered pals
B. configurable pals
C. pal programming
D. all of the mentioned

View Answer

Question 6

The equivalent of emitter-coupled logic made out of FETs is called                      

A. cml
B. scfl
C. fecl
D. efcl

View Answer

Question 7

In parts of the processor, adders are used to calculate                          

A. addresses
B. table indices
C. increment and decrement operators
D. all of the mentioned

View Answer

Question 8

Which of the following is correct about logic gates?

A. Logic gates have one or more input signals and only one output signal
B. Logic gates have only one input and output signal
C. Logic gates are analogous circuits
D. Logic gates have only one input and many output signals

View Answer

Question 9

Zero suppression is not used in actual practice.

A. TRUE
B. FALSE

View Answer

Question 10

Fusing process is                        

A. reversible
B. irreversible
C. synchronous
D. asynchronous

View Answer

Question 11

The expression for Absorption law is given by                    

A. a + ab = a
B. a + ab = b
C. ab + aa’ = a
D. a + b = b + a

View Answer

Question 12

Each product term of a group, w’.x.y’ and w.y, represents the                         in that group.

A. input
B. pos
C. sum-of-minterms
D. sum of maxterms

View Answer

Question 13

What is the major difference between half- adders and full-adders?

A. full-adders are made up of two half-adders
B. full adders can handle double-digit numbers
C. full adders have a carry input capability
D. half adders can handle only single-digit numbers

View Answer

Question 14

Maxterm is the sum of                      of the corresponding Minterm with its literal complemented.

A. terms
B. words
C. numbers
D. nibble

View Answer

Question 15

The selector inputs to an arithmetic/logic unit (ALU) determine the                          

A. selection of the ic
B. arithmetic or logic function
C. data word selection
D. clock frequency to be used

View Answer

Question 16

The number of logic gates and the way of their interconnections can be classified as

A. logical network
B. system network
C. circuit network
D. gate network

View Answer

Question 17

If minuend = 0, subtrahend = 1 and borrow input = 1 in a full subtractor then the borrow output will be                      

A. 0
B. 1
C. floating
D. high impedance

View Answer

Question 18

A 12 bit ADC is used to convert analog voltage of 0 to 10 V into digital. The resolution is

A. 2.44 mV
B. 24.4 mV
C. 1.2 V
D. none of the above

View Answer

Question 19

The full form of PLD is                      

A. programmable large device
B. programmable long device
C. programmable logic device
D. programmable lengthy device

View Answer

Question 20

PLD contains a large number of

A. flip-flops
B. gates
C. registers
D. all of the mentioned

View Answer

Question 21

In a 7 segment display, LEDs b and c lit up. The decimal number displayed is

A. 9
B. 7
C. 3
D. 1

View Answer

Question 22

When numbers, letters or words are represented by a special group of symbols, this process is called                      

A. decoding
B. encoding
C. digitizing
D. inverting

View Answer

Question 23

The complement of the input given is obtained in case of:

A. nor
B. and+nor
C. not
D. ex-or

View Answer

Question 24

Ring shift and Johnson counters are

A. synchronous counters
B. asynchronous counters
C. true binary counters
D. synchronous and true binary counters

View Answer

Question 25

The decimal number system represents the decimal number in the form of                          

A. hexadecimal
B. binary coded
C. octal
D. decimal

View Answer

Question 26

How many select lines are required for a 1- to-8 demultiplexer?

A. 2
B. 3
C. 4
D. 5

View Answer

Question 27

Fan-in is defined as                      

A. the number of outputs connected to gate without any degradation in the voltage levels
B. the number of inputs connected to gate without any degradation in the voltage levels
C. the number of outputs connected to gate with degradation in the voltage levels
D. the number of inputs connected to gate with degradation in the voltage levels

View Answer

Question 28

BCD input 1000 is fed to a 7 segment display through a BCD to 7 segment decoder/driver. The segments which will lit up are

A. a, b, d
B. a, b, c
C. all
D. a, b, g, c, d

View Answer

Question 29

Which is not a removable drive?

A. zip
B. hard disk
C. super disk
D. jaz

View Answer

Question 30

A ring counter with 5 flip flops will have

A. 5 states
B. 10 states
C. 32 states
D. infinite states

View Answer

Question 31

A digital multiplexer is a combinational circuit that selects                        

A. one digital information from several sources and transmits the selected one
B. many digital information and convert them into one
C. many decimal inputs and transmits the selected information
D. many decimal outputs and accepts the selected information

View Answer

Question 32

4 to 1 MUX would have                          

A. 1 output
B. 2 outputs
C. 3 outputs
D. 4 outputs

View Answer

Question 33

An AND gate has two inputs A and B and one inhibit input 3, Output is 1 if

A. A = 1, B = 1, S = 1
B. A = 1, B = 1, S = 0
C. A = 1, B = 0, S = 1
D. A = 1, B = 0, S = 0

View Answer

Question 34

The expression Y=(A+B)(B+C)(C+A) shows the                    operation.

A. and
B. pos
C. sop
D. nand

View Answer

Question 35

A decade counter skips

A. binary states 1000 to 1111
B. binary states 0000 to 0011
C. binary states 1010 to 1111
D. binary states 1111 to higher

View Answer

Question 36

An OR gate can be imagined as

A. switches connected in series
B. switches connected in parallel
C. mos transistor connected in series
D. bjt transistor connected in series

View Answer

Question 37

The first step in the design of memory decoder is                      

A. selection of a eprom
B. selection of a ram
C. address assignment
D. data insertion

View Answer

Question 38

A 74HC195 4-bit parallel access shift register can be used for                          

A. serial in/serial out operation
B. serial in/parallel out operation
C. parallel in/serial out operation
D. all of the mentioned

View Answer

Question 39

The full form of SCFL is                      

A. source-collector logic
B. source-coupled logic
C. source-complementary logic
D. source cored logic

View Answer

Question 40

To read from the memory, the select input and the power down/program input must be

A. high
B. low
C. sometimes high and sometimes low
D. alternate high and low

View Answer

Question 41

Which device has one input and many outputs?

A. Multiplexer
B. Demultiplexer
C. Counter
D. Flip flop

View Answer

Question 42

The full form of ECL is                      

A. emitter-collector logic
B. emitter-complementary logic
C. emitter-coupled logic
D. emitter-cored logic

View Answer

Question 43

It should be kept in mind that don’t care terms should be used along with the terms that are present in                        

A. minterms
B. expressions
C. k-map
D. latches

View Answer

Question 44

Half subtractor is used to perform subtraction of                        

A. 2 bits
B. 3 bits
C. 4 bits
D. 5 bits

View Answer

Question 45

PLA is used to implement                          

A. a complex sequential circuit
B. a simple sequential circuit
C. a complex combinational circuit
D. a simple combinational circuit

View Answer

Question 46

What should be done to obtain an OR gate from a NAND gate?

A. We need only 3 NAND gates
B. We need two NOT gates obtained from NAND gates and one NAND gate
C. We need 3 NOT gates obtained from NAND gates and 3 NAND gates
D. We need 2 NAND gates and 4 AND gates obtained from NAND gates.

View Answer

Question 47

4 to 1 MUX would have                          

A. 2 inputs
B. 3 inputs
C. 4 inputs
D. 5 inputs

View Answer

Question 48

There are              cells in a 4-variable K- map.

A. 12
B. 16
C. 18
D. 8

View Answer

Question 49

The full form of SIPO is                        

A. serial-in parallel-out
B. parallel-in serial-out
C. serial-in serial-out
D. serial-in peripheral-out

View Answer

Question 50

1's complement of 11100110 is

A. 11001
B. 10000001
C. 11010
D. 0

View Answer

Question 51

The complex programmable logic device contains several PLD blocks and                      

A. a language compiler
B. and/or arrays
C. global interconnection matrix
D. field-programmable switches

View Answer

Question 52

How many AND gates are required to realize the following expression Y=AB+BC?

A. 4
B. 8
C. 1
D. 2

View Answer

Question 53

The very first computer memory consisted of                      

A. a small display
B. a large memory storage equipment
C. an automatic keyboard input
D. an automatic mouse input

View Answer

Question 54

In a ripple counter,

A. whenever a flip flop sets to 1, the next higher FF toggles
B. whenever a flip flop sets to 0, the next higher FF remains unchanged
C. whenever a flip flop sets to 1, the next higher FF faces race condition
D. whenever a flip flop sets to 0, the next higher FF faces race condition

View Answer

Question 55

The full form of VLSI is                          

A. very long single integration
B. very least scale integration
C. very large scale integration
D. very long scale integration

View Answer

Question 56

Number of outputs in a half adder

A. 1
B. 2
C. 3

View Answer

Question 57

The parallel outputs of a counter circuit represent the                            

A. parallel data word
B. clock frequency
C. counter modulus
D. clock count

View Answer

Question 58

Full subtractor is used to perform subtraction of                        

A. 2 bits
B. 3 bits
C. 4 bits
D. 8 bits

View Answer

Question 59

In a multiplexer the output depends on its

A. data inputs
B. select inputs
C. select outputs
D. enable pin

View Answer

Question 60

Minimum number of 2-input NAND gates required to implement the function F = (x + y) (Z + W) is

A. 3
B. 4
C. 5
D. 6

View Answer

Question 61

The access time of a word in 4 MB main memory is 100 ms. The access time of a word in a 32 kb data cache memory is 10 ns. The average data cache bit ratio is 0.95. The efficiency of memory access time is

A. 9.5 ns
B. 14.5 ns
C. 20 ns
D. 95 ns

View Answer

Question 62

In 2's complement representation the number 11100101 represents the decimal number

A. 37
B. -31
C. 27
D. -27

View Answer

Question 63

The involution of A is equal to                    

A. a
B. a’
C. 1

View Answer

Question 64

If A, B and C are the inputs of a full adder then the carry is given by                      

A. a and b or (a or b) and c
B. a or b or (a and b) c
C. (a and b) or (a and b)c
D. a xor b xor (a xor b) and c

View Answer

Question 65

In 1-to-4 multiplexer, if C1 = 0 & C2 = 1, then the output will be                        

A. y0
B. y1
C. y2
D. y3

View Answer

Question 66

VLSI chip utilizes                        

A. nmos
B. cmos
C. bjt
D. all of the mentioned

View Answer

Question 67

In S-R flip-flop, if Q = 0 the output is said to be                        

A. set
B. reset
C. previous state
D. current state

View Answer

Question 68

The octal equivalent of the decimal number (417)10 is            

A. (641)8
B. (619)8
C. (640)8
D. (598)8

View Answer

Question 69

In ROM, each bit combination that comes out of the output lines is called                        

A. memory unit
B. storage class
C. data word
D. address

View Answer

Question 70

The ROM is a                        

A. sequential circuit
B. combinational circuit
C. magnetic circuit
D. static circuit

View Answer

Question 71

A carry look ahead adder is frequently used for addition because

A. it costs less
B. it is faster
C. it is more accurate
D. is uses fewer gates

View Answer

Question 72

When performing subtraction by addition in the 2’s-complement system                          

A. the minuend and the subtrahend are both changed to the 2’s-complement
B. the minuend is changed to 2’s- complement and the subtrahend is left in its original form
C. the minuend is left in its original form and the subtrahend is changed to its 2’s- complement
D. the minuend and subtrahend are both left in their original form

View Answer

Question 73

3 CYCLES AND RACES, STATE REDUCTION

A. 1
B. 2
C. 3
D. 4

View Answer

Question 74

The truth table shows both the input and output signals.

A. True
B. False

View Answer

Question 75

There are                            Minterms for 3 variables (a, b, c).

A. 0
B. 2
C. 8
D. 1

View Answer

Question 76

On addition of -46 and +28 using 2’s complement, we get                          

A. 101110
B. 101110
C. 101111
D. 1001111

View Answer

Question 77

In ROM, each bit is a combination of the address variables is called                        

A. memory unit
B. storage class
C. data word
D. address

View Answer

Question 78

The resolution of an n bit DAC with a maximum input of 5 V is 5 mV. The value of n is

A. 8
B. 9
C. 10
D. 11

View Answer

Question 79

When both inputs of SR latches are high, the latch goes                        

A. unstable
B. stable
C. metastable
D. bistable

View Answer

Question 80

An 8-bit serial in/serial out shift register is used with a clock frequency of 2 MHz to achieve a time delay (td) of                  

A. 16 us
B. 8 us
C. 4 us
D. 2 us

View Answer

Question 81

What is data routing in a multiplexer?

A. it spreads the information to the control unit
B. it can be used to route data from one of several source to destination
C. it is an application of multiplexer
D. both it can be used to route data and it is an application of multiplexer

View Answer

Question 82

The expression of a NAND gate is               

A. a.b
B. a’b+ab’
C. (a.b)’
D. (a+b)’

View Answer

Question 83

6 MULTIPLEXER

A. to apply vcc
B. to connect ground
C. to active the entire chip
D. to active one half of the chip

View Answer

Question 84

How memory expansion is done?

A. by increasing the supply voltage of the memory ics
B. by decreasing the supply voltage of the memory ics
C. by connecting memory ics together
D. by separating memory ics

View Answer

Question 85

Which of the following correctly describes the distributive law.

A. ( a+b)(c+d)=ab+cd
B. (a+b).c=ac+bc
C. (ab)(a+b)=ab
D. (a.b)c=ac.ab

View Answer

Question 86

If a RAM chip has n address input lines then it can access memory locations upto

A. 2(n-1)
B. 2(n+1)
C. 2n
D. 22n

View Answer

Question 87

Identify the type of gate below from the equation

A. ex-nor gate
B. or gate
C. ex-or gate
D. nand gate

View Answer

Question 88

A circuit that compares two numbers and determine their magnitude is called

A. height comparator
B. size comparator
C. comparator
D. magnitude comparator

View Answer

Question 89

Why latches are called a memory devices?

A. it has capability to stare 8 bits of data
B. it has internal memory of 4 bit
C. it can store one bit of data
D. it can store infinite amount of data

View Answer

Question 90

Logic circuits can also be designed using

A. ram
B. rom
C. pld
D. pla

View Answer

Question 91

The output sum of two decimal digits can be represented in                          

A. gray code
B. excess-3
C. bcd
D. hexadecimal

View Answer

Question 92

A logic circuit that provides a HIGH output for both inputs HIGH or both inputs LOW is

A. ex-nor gate
B. or gate
C. ex-or gate
D. nand gate

View Answer

Question 93

PROMs are available in                        

A. bipolar and mosfet technologies
B. mosfet and fet technologies
C. fet and bipolar technologies
D. mos and bipolar technologies

View Answer

Question 94

The full form of PLD is                    

A. programmable load devices
B. programmable logic data
C. programmable logic devices
D. programmable loaded devices

View Answer

Question 95

BCD adder can be constructed with 3 IC packages each of                          

A. 2 bits
B. 3 bits
C. 4 bits
D. 5 bits

View Answer

Question 96

If the number of n selected input lines is equal to 2^m then it requires            select lines.

A. 2
B. m
C. n
D. 2n

View Answer

Question 97

The expression Y = pM (0, 1, 3, 4) is

A. POS
B. SOP
C. Hybrid
D. none of the above

View Answer

Question 98

The prime implicant which has at least one element that is not present in any other implicant is known as                        

A. essential prime implicant
B. implicant
C. complement
D. prime complement

View Answer

Question 99

The canonical sum of product form of the function y(A,B) = A + B is                      

A. ab + bb + a’a
B. ab + ab’ + a’b
C. ba + ba’ + a’b’
D. ab’ + a’b + a’b’

View Answer

Question 100

The octal number (651.124)8 is equivalent to              

A. 16
B. (1b0.10)16
C. (1a8.a3)16
D. (1b0.b0)16

View Answer

Question 101

In Boolean algebra, what will not (A + not (B)).C) be equal to?

A. 1
B. 2
C. 3
D. 4

View Answer

Question 102

(170)10 is equivalent to

A. (fd)16
B. (df)16
C. (aa)16
D. (af)16

View Answer

Question 103

How many AND, OR and EXOR gates are required for the configuration of full

A. 1, 2, 2002
B. 2, 1, 2002
C. 3, 1, 2002
D. 4, 0, 1

View Answer

Question 104

Parity systems are defined as either________ or ________ and will add an extra ________ tothe digital information being transmitted.

A. positive, negative, byte
B. odd, even, bit
C. upper, lower, digit
D. on, off, decimal

View Answer

Question 105

The                  gate is an OR gate followed by a NOT gate.

A. nand
B. exor
C. nor
D. exnor

View Answer

Question 106

What is meant by parallel load of a shift register?

A. all ffs are preset with data
B. each ff is loaded with data, one at a time
C. parallel shifting of data
D. all ffs are set with data

View Answer

Question 107

Both OR and AND gates can have only two inputs.

A. TRUE
B. FALSE

View Answer

Question 108

The greatest negative number which can be stored is 8 bit computer using 2's complement arithmetic is

A. -256
B. -128
C. -255
D. -127

View Answer

Question 109

A magnitude comparator is defined as a digital comparator which has                          

A. only one output terminal
B. two output terminals
C. three output terminals
D. no output terminal

View Answer

Question 110

Propagation delay is defined as

A. the time taken for the output of a gate to change after the inputs have changed
B. the time taken for the input of a gate to change after the outputs have changed
C. the time taken for the input of a gate to change after the intermediates have changed
D. the time taken for the output of a gate to change after the intermediates have changed

View Answer

Question 111

PAL refers to                          

A. programmable array loaded
B. programmable logic array
C. programmable array logic
D. programmable and logic

View Answer

Question 112

The enable input is also known as

A. select input
B. decoded input
C. strobe
D. sink

View Answer

Question 113

The output of a full subtractor is same as

A. half adder
B. full adder
C. half subtractor
D. decoder

View Answer

Question 114

The addition of two decimal digits in BCD can be done through                          

A. bcd adder
B. full adder
C. ripple carry adder
D. carry look ahead

View Answer

Question 115

The basic storage element in a digital system is

A. flip flop
B. counter
C. multiplexer
D. encoder

View Answer

Question 116

If A and B are the inputs of a half adder, the carry is given by                      

A. a and b
B. a or b
C. a xor b
D. a ex-nor b

View Answer

Question 117

Convert the following decimal number to 8-bit binary.

A. 101110112
B. 110111012
C. 101111012
D. 101111002

View Answer

Question 118

What is access time?

A. the time taken to move a stored word from one bit to other bits after applying the address bits
B. the time taken to write a word after applying the address bits
C. the time taken to read a stored word after applying the address bits
D. the time taken to erase a stored word after applying the address bits

View Answer

Question 119

The simplified expression of full adder carry is                          

A. c = xy+xz+yz
B. c = xy+xz
C. c = xy+yz
D. c = x+y+z

View Answer

Question 120

The cell type used inside a PROM is

A. link cells
B. metal cells
C. fuse cells
D. electric cells

View Answer

Question 121

The group of bits 11001 is serially shifted (right-most bit first) into a 5-bit parallel output shift register with an initial state 01110. After three clock pulses, the register contains                  

A. 1110
B. 1
C. 101
D. 110

View Answer

Question 122

If enable input is high then the multiplexer is                              

A. enable
B. disable
C. saturation
D. high impedance

View Answer

Question 123

Can an encoder be called as multiplexer?

A. no
B. yes
C. sometimes
D. never

View Answer

Question 124

Refer to the given figures (a) and (b). A logic analyzer is used to check the circuit in figure (a) and displays the waveforms shown in figure (b). The actual analyzer display shows all four data outputs, Q0-Q3. The analyzer's cursor is placed at position X and all four of the data output lines show a LOW level output. What is wrong, if anything, with the circuit?

A. nothing is wrong, according to the display. the outputs are in the open state and should show zero output voltage.
B. the circuit is in the read mode and the outputs, q0-q3, should reflect the contents of the memory at that address. the chip is defective; replace the chip.
C. the circuit is in the mode and should be writing the contents of the selected address to q0–q3.
D. the q0–q3 lines can be either low or high, since the chip is in the tristate mode in which case their level is unpredictable.

View Answer

Question 125

The hexadecimal number (3E8)16 is equal to decimal number

A. 1000
B. 982
C. 768
D. 323

View Answer

Question 126

2's complement of binary number 0101 is

A. 1011
B. 1111
C. 1101
D. 1110

View Answer

Question 127

The time required for a gate or inverter to change its state is called                      

A. rise time
B. decay time
C. propagation time
D. charging time

View Answer

Question 128

How is an strobe signal used when serially loading a shift register?

A. to turn the register on and off
B. to control the number of clocks
C. to determine which output qs are used
D. to determine the ffs that will be used

View Answer

Question 129

The word demultiplex means                        

A. one into many
B. many into one
C. distributor
D. one into many as well as distributor

View Answer

Question 130

Odd parity of word can be conveniently tested by                        

A. or gate
B. and gate
C. nand gate
D. xor gate

View Answer

Question 131

ROM is made up of                        

A. nand and or gates
B. nor and decoder
C. decoder and or gates
D. nand and decoder

View Answer

Question 132

The EPROM was invented by

A. wen tsing chow
B. dov frohman
C. luis o brian
D. j p longwell

View Answer

Question 133

One that is not the outcome of magnitude comparator is                          

A. a > b
B. a – b
C. a < b
D. a = b

View Answer

Question 134

The SR latch consists of                        

A. 1 input
B. 2 inputs
C. 3 inputs
D. 4 inputs

View Answer

Question 135

EPROM uses an array of

A. p-channel enhancement type mosfet
B. n-channel enhancement type mosfet
C. p-channel depletion type mosfet
D. n-channel depletion type mosfet

View Answer

Question 136

One example of the use of an S-R flip-flop is as                        

A. transition pulse generator
B. racer
C. switch debouncer
D. astable oscillator

View Answer

Question 137

In the expression A + BC, the total number of minterms will be

A. 2
B. 3
C. 4
D. 5

View Answer

Question 138

Memory is a/an                        

A. device to collect data from other computer
B. block of data to keep data separately
C. indispensable part of computer
D. device to connect through all over the world

View Answer

Question 139

The full form of SR is                        

A. system rated
B. set reset
C. set ready
D. set rated

View Answer

Question 140

The fixed count that should be used so that the output register will represent the input for a 6 bit dual slope A/D converter uses a reference of -6v and a 1 MHz clock. It uses a fixed count of 40 (101000).

A. 110
B. 10
C. 1111
D. 11101

View Answer

Question 141

The initial values in all the cells of an EPROM is                              

A. 0
B. 1
C. both 0 and 1
D. alternate 0s and 1s

View Answer

Question 142

A bidirectional 4-bit shift register is storing the nibble 1101. Its input is HIGH. The nibble 1011 is waiting to be entered on the serial data-input line. After three clock pulses, the shift register is storing                  

A. 1101
B. 111
C. 1
D. 1110

View Answer

Question 143

A variable on its own or in its complemented form is known as a

A. product term
B. literal
C. sum term
D. word

View Answer

Question 144

How many basic logic gates are there?

A. 1
B. 2
C. 3
D. 4

View Answer

Question 145

If A and B are the inputs of a half adder, the sum is given by                      

A. a and b
B. a or b
C. a xor b
D. a ex-nor b

View Answer

Question 146

The given hexadecimal number (1E.53)16 is equivalent to                          

A. (35.684)8
B. (36.246)8
C. (34.340)8
D. (35.599)8

View Answer

Question 147

In ECL the fanout capability is

A. high
B. low
C. zero
D. sometimes high and sometimes low

View Answer

Question 148

Three decade counter would have

A. 2 bcd counters
B. 3 bcd counters
C. 4 bcd counters
D. 5 bcd counters

View Answer

Question 149

Controlled buffers can be useful

A. to control the circuit’s output into the bus
B. in comparison of component’s output with its input
C. in increasing the output from its low input
D. all of the mentioned

View Answer

Question 150

The n-bit address is placed in the

A. mbr
B. mar
C. ram
D. rom

View Answer

Question 151

In FPGA, vertical and horizontal directions are separated by                          

A. a line
B. a channel
C. a strobe
D. a flip-flop

View Answer

Question 152

The ECL circuits usually operates with

A. negative voltage
B. positive voltage
C. grounded voltage
D. high voltage

View Answer

Question 153

How many address bits are required to select memory location in Memory decoder?

A. 4 kb
B. 8 kb
C. 12 kb
D. 16 kb

View Answer

Question 154

ECL’s major disadvantage is that

A. it requires more power
B. it’s fanout capability is high
C. it creates more noise
D. it is slow

View Answer

Question 155

AB + AB =

A. B
B. A
C. 1
D. 0

View Answer

Question 156

At the time of invention, an ECL was called as                      

A. source-coupled logic
B. current mode logic
C. current-steering logic
D. emitter-coupled logic

View Answer

Question 157

In 1-to-4 multiplexer, if C1 = 1 & C2 = 1, then the output will be                        

A. y0
B. y1
C. y2
D. y3

View Answer

Question 158

Two stable states of latches are

A. astable & monostable
B. low input & high output
C. high output & low output
D. low output & high input

View Answer

Question 159

Why are ROMs called non-volatile memory?

A. they lose memory when power is removed
B. they do not lose memory when power is removed
C. they lose memory when power is supplied
D. they do not lose memory when power is supplied

View Answer

Question 160

The full form of CML is                      

A. complementary mode logic
B. current mode logic
C. collector mode logic
D. collector mixed logic

View Answer

Question 161

Moore machine has                    states than a mealy machine.

A. fewer
B. more
C. equal
D. negligible

View Answer

Question 162

All the comparisons made by comparator is done using                          

A. 1 circuit
B. 2 circuits
C. 3 circuits
D. 4 circuits

View Answer

Question 163

BCD counter is also known as

A. parallel counter
B. decade counter
C. synchronous counter
D. vlsi counter

View Answer

Question 164

If A, B and C are the inputs of a full adder then the sum is given by                      

A. a and b and c
B. a or b and c
C. a xor b xor c
D. a or b or c

View Answer

Question 165

The difference between half adder and full adder is                      

A. half adder has two inputs while full adder has four inputs
B. half adder has one output while full adder has two outputs
C. half adder has two inputs while full adder has three inputs
D. all of the mentioned

View Answer

Question 166

Decimal 43 in hexadecimal and BCD number system is respectively.

A. B2, 01000011
B. 2B, 01000011
C. 2B, 00110100
D. B2, 01000100

View Answer

Question 167

According to boolean law: A + 1 = ?

A. 1
B. a
C. a’

View Answer

Question 168

CMOS refers to                      

A. continuous metal oxide semiconductor
B. complementary metal oxide semiconductor
C. centred metal oxide semiconductor
D. concrete metal oxide semiconductor

View Answer

Question 169

If a PAL has been programmed once

A. its logic capacity is lost
B. its outputs are only active high
C. its outputs are only active low
D. it cannot be reprogrammed

View Answer

Question 170

A combinational circuit that selects one from many inputs are                          

A. encoder
B. decoder
C. demultiplexer
D. multiplexer

View Answer

Question 171

Output values of Moore type FSM are determined by its                  

A. input values
B. output values
C. clock input
D. current state

View Answer

Question 172

A three state switch has three outputs. These are

A. low, low and high
B. low, high, high
C. low. floating, low
D. low, high, floating

View Answer

Question 173

In case of XOR/XNOR simplification we have to look for the following

A. diagonal adjacencies
B. offset adjacencies
C. straight adjacencies
D. both diagonal and offset adjencies

View Answer

Question 174

Non inverting dynamic register storage cell consists of                    transistors for nMOS and                    for CMOS.

A. six, eight
B. eight, six
C. five, six
D. six, five

View Answer

Question 175

If we record any music in any recorder, such types of process is called                        

A. multiplexing
B. encoding
C. decoding
D. demultiplexing

View Answer

Question 176

When both inputs of SR latches are low, the latch                        

A. q output goes high
B. q’ output goes high
C. it remains in its previously set or reset state
D. it goes to its next set or reset state

View Answer

Question 177

Logic circuits that are designated as buffers, drivers or buffers/drivers are designed to have:

A. a greater current/voltage capability than an ordinary logic circuit
B. greater input current/voltage capability than an ordinary logic circuit
C. a smaller output current/voltage capability than an ordinary logic
D. greater the input and output current/voltage capability than an ordinary logic circuit

View Answer

Question 178

expressions can be implemented using either (1) 2-level AND- OR logic circuits or (2) 2-level NAND logic circuits.

A. pos
B. literals
C. sop
D. pos

View Answer

Question 179

If two numbers are not equal then binary variable will be                          

A. 0
B. 1
C. a
D. b

View Answer

Question 180

How many inputs are required for a digital comparator?

A. 1
B. 2
C. 3
D. 4

View Answer

Question 181

A register file holds                      

A. a large number of word of information
B. a small number of word of information
C. a large number of programs
D. a modest number of words of information

View Answer

Question 182

The logical sum of two or more logical product terms is called                      

A. sop
B. pos
C. or operation
D. nand operation

View Answer

Question 183

The instruction used in a program for executing them is stored in the                      

A. cpu
B. control unit
C. memory
D. microprocessor

View Answer

Question 184

PLA contains                          

A. and and or arrays
B. nand and or arrays
C. not and and arrays
D. nor and or arrays

View Answer

Question 185

A procedure that specifies finite set of steps is called                          

A. algorithm
B. flow chart
C. chart
D. venn diagram

View Answer

Question 186

In digital logic, a counter is a device which

A. counts the number of outputs
B. stores the number of times a particular event or process has occurred
C. stores the number of times a clock pulse rises and falls
D. counts the number of inputs

View Answer

Question 187

DeMorgan’s theorem states that                    

A. (ab)’ = a’ + b’
B. (a + b)’ = a’ * b
C. a’ + b’ = a’b’
D. (ab)’ = a’ + b

View Answer

Question 188

Which of the following gates can have only one input?

A. OR gate
B. NOT gate
C. AND gate
D. NAND gate

View Answer

Question 189

With a 200 kHz clock frequency, eight bits can be serially entered into a shift register in

A. 4 μs
B. 40 μs
C. 400 μs
D. 40 ms

View Answer

Question 190

A basic S-R flip-flop can be constructed by cross-coupling of which basic logic gates?

A. and or or gates
B. xor or xnor gates
C. nor or nand gates
D. and or nor gates

View Answer

Question 191

The inputs of SR latch are                        

A. x and y
B. a and b
C. s and r
D. j and k

View Answer

Question 192

Another way to connect devices to a shared data bus is to use a                          

A. circulating gate
B. transceiver
C. bidirectional encoder
D. strobed latch

View Answer

Question 193

A memory system of size 16 k bytes is to be designed using memory chips which have 12 address lines and 4 data lines each. The number of such chips required to design the memory system is

A. 2
B. 4
C. 8
D. 18

View Answer

Question 194

Dynamic RAM employs                      

A. capacitor or mosfet
B. fet or jfet
C. capacitor or bjt
D. bjt or mos

View Answer

Question 195

A decimal counter has              states.

A. 5
B. 10
C. 15
D. 20

View Answer

Question 196

For the minterm designation Y = ∑ m (1, 3, 5, 7) the complete expression is

A. Y = A BC + A B C
B. Y = A B C + A B C + ABC + A BC
C. Y = A B C + A B C + ABC + A BC
D. Y = A B C + ABC + A BC + A BC

View Answer

Question 197

On subtracting +28 from +29 using 2’s complement, we get                          

A. 11111010
B. 111111001
C. 100001
D. 1

View Answer

Question 198

RAM is also known as                      

A. rwm
B. mbr
C. mar
D. rom

View Answer

Question 199

The NAND latch works when both inputs are                        

A. 1
B. 0
C. inverted
D. don’t cares

View Answer

Question 200

Computers invariably use RAM for

A. high complexity
B. high resolution
C. high speed main memory
D. high flexibility

View Answer

Question 201

ROM has the capability to perform

A. write operation only
B. read operation only
C. both write and read operation
D. erase operation

View Answer

Question 202

A device which converts BCD to seven segment is called

A. encoder
B. decoder
C. multiplexer
D. none of these

View Answer

Question 203

Let A and B is the input of a subtractor then the output will be                        

A. a xor b
B. a and b
C. a or b
D. a exnor b

View Answer

Question 204

The ECL behaves as                      

A. not gate
B. nor gate
C. nand gate
D. and gate

View Answer

Question 205

On addition of +38 and -20 using 2’s complement, we get                          

A. 11110001
B. 100001110
C. 10010
D. 110101011

View Answer

Question 206

Decimal number 10 is equal to binary number

A. 1110
B. 1010
C. 1001
D. 1000

View Answer

Question 207

3 bits full adder contains                          

A. 3 combinational inputs
B. 4 combinational inputs
C. 6 combinational inputs
D. 8 combinational inputs

View Answer

Question 208

In a BCD to 7 segment decoder the minimum and maximum number of outputs active at any time is

A. 2 and 7
B. 3 and 7
C. 1 and 6
D. 3 and 6

View Answer

Question 209

As the temperature is increased, storage time                          

A. halved
B. doubled
C. does not change
D. tripled

View Answer

Question 210

7BF16 = __________ 2

A. 0111 1011 1110
B. 0111 1011 1111
C. 0111 1011 0111
D. 0111 1011 0011

View Answer

Question 211

An OR gate has 4 inputs. One input is high and the other three are low. The output

A. is low
B. is high
C. is alternately high and low
D. may be high or low depending on relative magnitude of inputs

View Answer

Question 212

A JK flip flop has tpd= 12 ns. The largest modulus of a ripple counter using these flip flops and operating at 10 MHz is

A. 16
B. 64
C. 128
D. 256

View Answer

Question 213

When both inputs of a J-K flip-flop cycle, the output will                        

A. be invalid
B. change
C. not change
D. toggle

View Answer

Question 214

A large memory is compressed into a small one by using                      

A. lsi semiconductor
B. vlsi semiconductor
C. cdr semiconductor
D. ssi semiconductor

View Answer

Question 215

Propagation delay times can be divided as

A. t(plh) and t(lph)
B. t(lph) and t(phl)
C. t(plh) and t(phl)
D. t(hpl) and t(lph)

View Answer

Question 216

The output of a half adder is

A. SUM
B. CARRY
C. SUM and CARRY
D. none of the above

View Answer

Question 217

The maximum noise voltage that may appear at the input of a logic gate without changing the logical state of its output is termed as                      

A. noise margin
B. noise immunity
C. white noise
D. signal to noise ratio

View Answer

Question 218

The output of latches will remain in set/reset untill                        

A. the trigger pulse is given to change the state
B. any pulse given to go into previous state
C. they don’t get any pulse more
D. the pulse is edge-triggered

View Answer

Question 219

The first step of analysis procedure of SR latch is to                        

A. label inputs
B. label outputs
C. label states
D. label tables

View Answer

Question 220

Static RAM employs                      

A. bjt or mosfet
B. fet or jfet
C. capacitor or bjt
D. bjt or mos

View Answer

Question 221

One multiplexer can take the place of

A. several ssi logic gates
B. combinational logic circuits
C. several ex-nor gates
D. several ssi logic gates or combinational logic circuits

View Answer

Question 222

ECL was invented in                by

A. 1956, baker clamp
B. 1976, james r. biard
C. 1956, hannon s. yourke
D. 1976, yourke

View Answer

Question 223

TTL 74LS85 is a                            

A. 1-bit digital comparator
B. 4-bit magnitude comparator
C. 8-bit magnitude comparator
D. 8-bit word comparator

View Answer

Question 224

The full subtractor can be implemented using                        

A. two xor and an or gates
B. two half subtractors and an or gate
C. two multiplexers and an and gate
D. two comparators and an and gate

View Answer

Question 225

The inputs/outputs of an analog multiplexer/demultiplexer are                          

A. bidirectional
B. unidirectional
C. even parity
D. binary-coded decimal

View Answer

Question 226

In the given 4-to-1 multiplexer, if c1 = 0 and c0 = 1 then the output M is                        

A. x0
B. x1
C. x2
D. x3

View Answer

Question 227

Data stored in an electronic memory cell can be accessed at random and on demand

A. erom
B. ram
C. prom
D. eeprom

View Answer

Question 228

Convert the binary number (01011.1011)2 into decimal:

A. (11.6875)10
B. (11.5874)10
C. (10.9876)10
D. (10.7893)10

View Answer

Question 229

is used to drive high capacitance load.

A. single polar capability
B. bipolar capability
C. tripolar capability
D. bi and tri polar capability

View Answer

Question 230

The number of distinct Boolean expression of 4 variables is

A. 16
B. 256
C. 1024
D. 65536

View Answer

Question 231

An identify comparator is defined as a digital comparator which has                          

A. only one output terminal
B. two output terminals
C. three output terminals
D. no output terminal

View Answer

Question 232

VLSI chip utilizes                                            

A. nmos
B. cmos
C. bjt
D. all of the mentioned

View Answer

Question 233

How many AND gates are required for a 1- to-8 multiplexer?

A. 2
B. 6
C. 8
D. 5

View Answer

Question 234

CD-ROM refers to                      

A. floppy disk
B. compact disk-read only memory
C. compressed disk-read only memory
D. compressed disk- random access memory

View Answer

Question 235

The FPGA refers to                          

A. first programmable gate array
B. field programmable gate array
C. first program gate array
D. field program gate array

View Answer

Question 236

A latch is an example of a                        

A. monostable multivibrator
B. astable multivibrator
C. bistable multivibrator
D. 555 timer

View Answer

Question 237

In register index addressing mode the effective address is given by

A. index register value
B. sum of the index register value and the operand
C. operand
D. difference of the index register value and the operand

View Answer

Question 238

The time from the beginning of a read cycle to the end of tACS/tAA is called as

A. write enable time
B. data hold
C. read cycle time
D. access time

View Answer

Question 239

The Output is LOW if any one of the inputs is HIGH in case of a                    gate.

A. nor
B. nand
C. or
D. and

View Answer

Question 240

The primary purpose of a three-state buffer is usually                          

A. to provide isolation between the input device and the data bus
B. to provide the sink or source current required by any device connected to its output without loading down the output device
C. temporary data storage
D. to control data flow

View Answer

Question 241

It is possible for an enable or strobe input to undergo an expansion of two or more MUX ICs to the digital multiplexer with the proficiency of large number of                        

A. inputs
B. outputs
C. selection lines
D. enable lines

View Answer

Question 242

The check sum method of testing a ROM

A. allows data errors to be pinpointed to a specific memory location
B. provides a means for locating and correcting data errors in specific memory locations
C. indicates if the data in more than one memory location is incorrect
D. simply indicates that the contents of the rom are incorrect

View Answer

Question 243

State transition happens                in every clock cycle.

A. once
B. twice
C. thrice
D. four times

View Answer

Question 244

Let A and B is the input of a subtractor then the borrow will be                        

A. a and b’
B. a’ and b
C. a or b
D. a and b

View Answer

Question 245

The outputs of SR latch are                        

A. x and y
B. a and b
C. s and r
D. q and q’

View Answer

Question 246

IC 4116 is organised as                    

A. 512 * 4
B. 16 * 1
C. 32 * 4
D. 64 * 2

View Answer

Question 247

The decimal number 10 is represented in its BCD form as                      

A. 10100000
B. 1010111
C. 10000
D. 101011

View Answer

Question 248

The logic circuits whose outputs at any instant of time depends only on the present input but also on the past outputs are called

A. combinational circuits
B. sequential circuits
C. latches
D. flip-flops

View Answer

Question 249

In a comparator, if we get input as A>B then the output will be                          

A. 1
B. 0
C. a
D. b

View Answer

Question 250

Address decoding for dynamic memory chip control may also be used for

A. chip selection and address location
B. read and write control
C. controlling refresh circuits
D. memory mapping

View Answer

Question 251

What is the meaning of RAM, and what is its primary role?

A. readily available memory; it is the first level of memory used by the computer in all of its operations.
B. random access memory; it is memory that can be reached by any sub- system within a computer, and at any time.
C. random access memory; it is the memory used for short-term temporary data storage within the computer.
D. resettable automatic memory; it is memory that can be used and then automatically reset, or cleared, after being read from or written to.

View Answer

Question 252

A                          is a circuit with only one output but can have multiple inputs.

A. logic gate
B. truth table
C. binary circuit
D. boolean circuit

View Answer

Question 253

What must be done to interface TTL to CMOS?

A. a dropping resistor must be used on the cmos of 12 v supply to reduce it to 5 v for the ttl
B. as long as the cmos supply voltage is 5 v they can be interfaced (however, the fan- out of the ttl is limited to five cmos gates)
C. a 5 v zener diode must be placed across the inputs of the ttl gates in order to protect them from the higher output voltages of the cmos gates
D. a pull-up resistor must be used between the ttl output-cmos input node and vcc; the value of rp will depend on the number of cmos gates connected to the node

View Answer

Question 254

A basic multiplexer principle can be demonstrated through the use of a

A. single-pole relay
B. dpdt switch
C. rotary switch
D. linear stepper

View Answer

Question 255

Which of the following describes the action of storing a bit of data in a mask ROM?

A. a 0 is stored by connecting the gate of a mos cell to the address line
B. a 0 is stored in a bipolar cell by shorting the base connection to the address line
C. a 1 is stored by connecting the gate of a mos cell to the address line
D. a 1 is stored in a bipolar cell by opening the base connection to the address line

View Answer

Question 256

If a DAC has a full-scale, or maximum, output of 12 V and accuracy of 0.1%, then the maximum error for any output voltage is ________.

A. 12 v
B. 120 mv
C. 12 mv
D. 0 v

View Answer

Question 257

Canonical form is a unique way of representing                          

A. sop
B. minterm
C. boolean expressions
D. pos

View Answer

Question 258

A binary-weighted-input digital-to-analog converter has a feedback resistor, Rf, of 12 k. If 50 A of current is through the resistor, voltage out of the circuit is ________.

A. 0.6 v
B. –0.6 v
C. 0.1 v
D. –0.1 v

View Answer

Question 259

ROMs retain data when                              

A. power is on
B. power is off
C. system is down
D. all of the mentioned

View Answer

Question 260

Which of the following is non-saturating?

A. TTL
B. CMOS
C. ECL
D. Both (a) and (b)

View Answer

Question 261

The number of full and half adders are required to add 16-bit number is                      

A. 8 half adders, 8 full adders
B. 1 half adders, 15 full adders
C. 16 half adders, 0 full adders
D. 4 half adders, 12 full adders

View Answer

Question 262

The basic latch consists of                        

A. two inverters
B. two comparators
C. two amplifiers
D. two adders

View Answer

Question 263

A serial in/parallel out, 4-bit shift register initially contains all 1s. The data nibble 0111 is waiting to enter. After four clock pulses, the register contains                  

A. 0
B. 1111
C. 111
D. 1000

View Answer

Question 264

The boolean function A + BC is a reduced form of                          

A. ab + bc
B. (a + b)(a + c)
C. a’b + ab’c
D. (a + c)b

View Answer

Question 265

Low-voltage positive emitter-coupled logic (LVPECL) is a power optimized version of                      

A. ecl
B. vecl
C. pecl
D. lecl

View Answer

Question 266

What is the maximum possible range of bit-count specifically in n-bit binary counter consisting of ‘n’ number of flip-flops?

A. 0 to 2n
B. 0 to 2n + 1
C. 0 to 2n – 1 d) 0 to 2n+1/2

View Answer

Question 267

To store 0 in such a cell, the floating point must be                              

A. reprogrammed
B. restarted
C. charged
D. power off

View Answer

Question 268

Maxterm designation for A + B + C is

A. M0
B. M1
C. M3
D. M4

View Answer

Question 269

In an ECL the output is taken from

A. emitter
B. base
C. collector
D. junction of emitter and base

View Answer

Question 270

A PLA is similar to a ROM in concept except that                          

A. it hasn’t capability to read only
B. it hasn’t capability to read or write operation
C. it doesn’t provide full decoding to the variables
D. it hasn’t capability to write only

View Answer

Question 271

There are 5 universal gates.

A. TRUE
B. FALSE

View Answer

Question 272

A full adder can be made out of

A. two half adders
B. two half adders and a OR gate
C. two half adders and a NOT gate
D. three half adders

View Answer

Question 273

Complement of F’ gives back                      

A. f’
B. f
C. ff
D. ff’

View Answer

Question 274

Complement of the expression A’B + CD’ is                    

A. (a’ + b)(c’ + d)
B. (a + b’)(c’ + d)
C. (a’ + b)(c’ + d)
D. (a + b’)(c + d’)

View Answer

Question 275

Metal links are made up of                        

A. polycrystalline
B. magnesium sulphide
C. nichrome
D. silicon dioxide

View Answer

Question 276

Latch is a device with                        

A. one stable state
B. two stable state
C. three stable state
D. infinite stable states

View Answer

Question 277

An 8 bit DAC has a full scale output of 2 mA and full scale error of ± 0.5%. If input is 10000000 the range of outputs is

A. 994 to 1014 μA
B. 990 to 1020 μA
C. 800 to 1200 μA
D. none of the above

View Answer

Question 278

Outputs of the AND gate in PLD is known as                          

A. input lines
B. output lines
C. strobe lines
D. control lines

View Answer

Question 279

29 input circuit will have total of

A. 32 entries
B. 128 entries
C. 256 entries
D. 512 entries

View Answer

Question 280

A counter type A/D converter contains a 4 bit binary ladder and a counter driven by a 2 MHz clock. Then conversion time

A. 8 μ sec
B. 10 μ sec
C. 2 μ sec
D. 5 μ sec

View Answer

Question 281

The decimal equivalent of the excess-3 number 110010100011.01110101 is

A. 970.42
B. 1253.75
C. 861.75
D. 1132.87

View Answer

Question 282

When a high is applied to the Set line of an SR latch, then                        

A. q output goes high
B. q’ output goes high
C. q output goes low
D. both q and q’ go high

View Answer

Question 283

Comparators are used in                          

A. memory
B. cpu
C. motherboard
D. hard drive

View Answer

Question 284

A ROM is defined as                      

A. read out memory
B. read once memory
C. read only memory
D. read one memory

View Answer

Question 285

Half-adders have a major limitation in that they cannot                      

A. accept a carry bit from a present stage
B. accept a carry bit from a next stage
C. accept a carry bit from a previous stage
D. accept a carry bit from the following stages

View Answer

Question 286

The sequential circuit is also called

A. flip-flop
B. latch
C. strobe
D. adder

View Answer

Question 287

Power Dissipation in DIC is expressed in

A. watts or kilowatts
B. milliwatts or nanowatts
C. db
D. mdb

View Answer

Question 288

The chip by which both the operation of read and write is performed                      

A. ram
B. rom
C. prom
D. eprom

View Answer

Question 289

Decimal digit in BCD can be represented by                          

A. 1 input line
B. 2 input lines
C. 3 input lines
D. 4 input lines

View Answer

Question 290

Convert the hexadecimal number (1E2)16 to decimal:

A. 480
B. 483
C. 482
D. 484

View Answer

Question 291

The data written in flip-flop remains stored as long as                      

A. d.c. power is supplied
B. d.c. power is removed
C. a.c. power is supplied
D. a.c. power is removed

View Answer

Question 292

A flip flop stores                                            

A. 10 bit of information
B. 1 bit of information
C. 2 bit of information
D. 3-bit information

View Answer

Question 293

The number of digits in octal system is

A. 8
B. 7
C. 9
D. 10

View Answer

Question 294

Product-of-Sums expressions can be implemented using                        

A. 2-level or-and logic circuits
B. 2-level nor logic circuits
C. 2-level xor logic circuits
D. both 2-level or-and and nor logic circuits

View Answer

Question 295

The difference between a PAL & a PLA is

A. pals and plas are the same thing
B. the pla has a programmable or plane and a programmable and plane, while the pal only has a programmable and plane
C. the pal has a programmable or plane and a programmable and plane, while the pla only has a programmable and plane
D. the pal has more possible product terms than the pla

View Answer