Home Topics Quiz Login

Standard Logic Devices (SLD) MCQ Questions & Answers

Standard Logic Devices (SLD) MCQs : This section focuses on the "Standard Logic Devices (SLD)". These Multiple Choice Questions (MCQs) should be practiced to improve the Standard Logic Devices (SLD) skills required for various interviews (campus interview, walk-in interview, company interview), placement, entrance exam and other competitive examinations.

Question 1

What is the standard TTL noise margin?

A. 5.0 V
B. 0.2 V
C. 0.8 V
D. 0.4 V

View Answer

Question 2

The range of a valid LOW input is:

A. 0.0 V to 0.4 V
B. 0.4 V to 0.8 V
C. 0.4 V to 1.8 V
D. 0.4 V to 2.4 V

View Answer

Question 3

What quantities must be compatible when interfacing two different logic families?

A. only the currents
B. both the voltages and the currents
C. only the voltages
D. both the power dissipation and the impedance

View Answer

Question 4

When an IC has two rows of parallel connecting pins, the device is referred to as:

A. a QFP
B. a DIP
C. a phase splitter

View Answer

Question 5

Which digital IC package type makes the most efficient use of printed circuit board space?

B. TO can
C. flat pack

View Answer

Question 6

A digital logic device used as a buffer should have what input/output characteristics?

A. high input impedance and high output impedance
B. low input impedance and high output impedance
C. low input impedance and low output impedance
D. high input impedance and low output impedance

View Answer

Question 7

The problem of interfacing IC logic families that have different supply voltages (VCCs) can be solved by using a:

A. level-shifter
B. tri-state shifter
C. translator
D. level-shifter or translator

View Answer

Question 8

CMOS logic is probably the best all-around circuitry because of its:

A. packing density
B. low power consumption
C. very high noise immunity
D. low power consumption and very high noise immunity

View Answer

Question 9

A TTL totem pole circuit is designed so that the output transistors are:

A. always on together
B. providing phase splitting
C. providing voltage regulation
D. never on together

View Answer

Question 10

Which of the following summarizes the important features of emitter-coupled logic (ECL)?

A. negative voltage operation, high speed, and high power consumption
B. good noise immunity, negative logic, high frequency capability, low power dissipation, and short propagation time
C. slow propagation time, high frequency response, low power consumption, and high output voltage swings
D. poor noise immunity, positive supply voltage operation, good low-frequency operation, and low power

View Answer

Question 11

Ten TTL loads per TTL driver is known as:

A. noise immunity
B. power dissipation
C. fanout
D. propagation delay

View Answer

Question 12

The time needed for an output to change as the result of an input change is known as:

A. noise immunity
B. fanout
C. propagation delay
D. rise time

View Answer

Question 13

Low power consumption achieved by CMOS circuits is due to which construction characteristic?

A. complementary pairs
B. connecting pads
C. DIP packages
D. small-scale integration

View Answer